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AFDX®: A Time-Deterministic application of ARINC 664 part 7

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Avionics Full-Duplex Switched Ethernet, or AFDX has become a key component in the industrial, automotive, and aerospace sectors of the ever-changing communication technology landscape.

AFDX provides fault-tolerant, deterministic communication and is designed to fulfill the demanding requirements of aviation systems. It easily interacts with industry standards such as IEEE 802.3 and ARINC 664.

AFDX’s influence extends to automotive and industrial domains, shaping communication networks for safety-critical environments. In this blog we explore the features, specifications, and so on about AFDX.



Many commercial aircraft use the ARINC 429 standard, designed in 1977, for safety-critical applications.

A unidirectional bus is used by ARINC 429 with a single transmitter and up to 20 receivers. Two transmission speeds are available: high speed runs at 100 kbit/s and low speed runs at 12.5 kbit/s.

ARINC 429 operates in such a way that it communicates with its single transmitter in point-to-point communication, thereby requiring a significant amount of wiring that amounts to extra weight.

Another standard, ARINC 629, introduced for the 777 by Boeing, offered higher data speeds of up to 2 Mbps and allowed a maximum of 128 data terminals. 

Airbus developed and patented the (Avionics Full Duplex Switched Ethernet) AFDX® data network to fix real-time issues for safety-critical avionics applications, initially for the A380.

AFDX® is one of the deterministic Ethernet implementations specified in ARINC Specification 664 Part 7.

The Airbus A350 also uses an AFDX® network, with avionics and systems supplied by Rockwell Collins, building upon the experience of the A380.

Through the EADS Technology Licensing initiative, Airbus and its parent company European Aeronautic Defence and Space Company (EADS) have made AFDX ® licenses available, including agreements with Selex ES and Vector Informatik GmbH.


Aircraft Data Network (ADN) is a concept in the ARINC 664 Specification defined by the Airlines Electronic Engineering Committee (AEEC).

Data networking standards proposed for use in commercial aircraft installations are recommended in this document.

The standards provide a way to apply Commercial off-the-shelf (COTS) networking standards to an aircraft system. It refers to devices and their use, such as bridges, switches, routers, and hubs, in an aircraft system.

When set up in network topology, this equipment can provide efficient data transfer and overall avionics efficiency.

The specification of ARINC 664 refers extensively to the set of standards developed for data networking by the Internet community and IEEE.

Across several sections, the specification is organized as follows:

  • Part 1 – Systems Concepts and Overview
  • Part 2 – Ethernet Physical and Data-Link Layer Specifications
  • Part 3 – Internet-based Protocols and Services
  • Part 4 – Internet-based Address Structure and Assigned Numbers
  • Part 5 – Network Domain Characteristics and Functional Elements
  • Part 6 – Reserved
  • Part 7 – Deterministic Networks
  • Part 8 – Upper Layer Protocol Services

The physical layer consists of an Ethernet network of star topologies with End Systems and layer two switches. Using Virtual Links (VL) is the defining characteristic of the network.

A logical data path through the shared network is specified by a VL. It describes a data flow from a single source to one or more destinations in one direction. 16 bits in the destination MAC address identify the VL. The switches use this to adequately route the frame. 

Frame Format:

The frame format of the AFDX® is IEEE Std 802.3 compliant. The frame includes addresses for defining the end systems of the source and destination, as well as the virtual link allocated.

The length of the AFDX® frame may vary between 64 and 1518 bytes (plus a 7-byte frame preamble, 1 frame start byte, and 12-byte interframe gap, with a payload of data between 1 and 1471 bytes (payload must be padded to a minimum length of 17 bytes).

7 bytes 1 byte 6 bytes 6 bytes 2 bytes 20 bytes 8 bytes 1-1471 bytes 0-16 bytes 1byte 4 bytes 12 bytes
Preamble Start Frame Delimiter Destination Address Source Address 0X800 IPv4 IP Structure UDP Structure AFDX Payload Padding SN Frame Check Sequence Inter-Frame Gap


Virtual Link:

A virtual link is a fixed path that originates from just one end system via the AFDX® network and delivers packets to a fixed group of end systems.

ARINC 429’s physical point-to-point connections are replaced by virtual links, connecting sensors, and actuators to the control units.

Frames are routed using a Virtual Link Id by the AFDX® switch that is encoded within the MAC address of the Ethernet destination.

Multiple virtual links can support the Ethernet connection on an end device. For transmission over the network, VL links are time-division multiplexed at the end system.

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The total bandwidth is shared by each connection. Each virtual link is allocated two parameters to prevent packets on one virtual link from interfering with packets on another virtual link using the same physical link.

The Bandwidth Allocation Gap (BAG) represents the minimum interval in the virtual connection between frames.

The Lmax is the largest Ethernet frame on a virtual link that can be transmitted. For each virtual connection, those two values provide a bandwidth limit.

Destination Address:

At the data link layer, the system integrator assigns each VL a MAC address. The 48-bit MAC destination address consists of a constant field of 32 bits (similar to all end systems on the network) and a VL of 16 bits. In the switch configuration,

AFDX frames are routed by the switch to all destination end systems specified for the VL.

32-bits 16-bits
Constant Field Vitual Link Identifier

Source Address:

The 48-bit MAC source address specifies the end system’s Ethernet controller originating from the frame.

The first 24 bits of the address are assigned a constant value. The constant value is followed by a 16-bit unique controller identifier set by the device integrator.

A 3-bit value used to define which network the controller is connected to is after the 16-bit specific identifier (001 for network A and 010 for network B, all other values are not used).

A constant is set for the final 5 bits: 00000.

24-bits 16-bits 3-bits 5-bits
Constant Field User-Defined Identifier Interface ID Constant Field
0000 0010 0000 0000 0000 0000 NNNN NNNN NNNN NNNN NNN 00000

Utilization Aspects:

With the growth of AFDX® is the emergence of Integrated Modular Avionics (IMA).

Rather than providing dedicated hardware for each Line-Replaceable Unit (LRU), a standardized computing platform is implemented to run one or more avionics subsystems.

As per Xilinx, it provides various embedded development platforms that offer versatility to designers concerning rapid prototyping and system verification such as ML410 (Virtex-4 FX) and ML510 (Virtex-5 FXT) series.

AFDX® endorses the Asynchronous Transfer Mode (ATM) concepts of the telecoms to overcome the limitations of IEEE 802.3 Ethernet.

Deploying these extensions to the standard ethernet helps in defining a deterministic network for the avionics that offers a higher Quality of Service (QoS) and Bandwidth.

These networks offer a higher degree of reliability over the single network schemes and operate at speeds of 10 Mbps to 100 Mbps.

BAG rate

One of the primary components of the AFDX protocol is the Bandwidth Allocation Gap or BAG. This is the fastest rate at which information can be transmitted and is assured to be transmitted at that time.

It is important to take precautions while selecting the BAG rate for each VL so that the overall speed does not surpass 100 Mbit/s and other VLs have enough bandwidth.

AFDX Switching

AFDX Switching

Image Source

A minimum of 4096 VLs should be processed by each switch’s filtering, policing, and forwarding features. Thus, in a network with several switches (cascaded star topology), the total number of virtual links is almost infinite. 

Each end system’s capacity to manage a given number of virtual links is unspecified; however, it will depend on the BAG rates and maximum frame size allowed for each VL about the Ethernet data rate. 

On the other hand, only four sub-VLs can be established in a single virtual link. In actuality, this could imply that the switch must have a switching capacity equal to the total of all of its physical ports since it must also not block at the data rates that the system integrator specifies.

High-performance COTS switches with Layer 2 routing can be used as AFDX switches for testing purposes as a cost-saving approach because AFDX uses the Ethernet protocol at the MAC layer. 

Nonetheless, certain functionalities of an authentic AFDX switch, such as redundancy and traffic control, might be absent.


The following are examples of AFDX buses: Airbus A380, Boeing 787, Airbus A400M, Airbus A350, Sukhoi Superjet 100, ATR 42, ATR 72 (-600), AgustaWestland AW101, AgustaWestland AW189, AgustaWestland AW169, Irkut MC-21, Bombardier Global Express, Bombardier C Series, Learjet 85, Commack ARJ21, Commack C919, AgustaWestland AW149. etc.


The development of ARINC 429 occurred during a period when the usage of programmable, consistent subsystems on airplanes was simply impractical because of factors including hardware cost, fragility, size, and energy expenditure.

429 connects systems at the pin level and only handles data flow between devices on a per-device basis. 

It has limitations compared to more recent standards, but only until multipurpose computers are networked. 

But in order to meet the demands of the modern world, AFDX integrates cutting-edge technology with tried-and-true safety and user-friendly features.

AFDX® offers a lot to discuss on its design to implementation from its network management perspective, end systems to switch methodology adopted which are not feasible to discuss all together here.

Take it, easy folks, I have respect for your curious minds, just follow my content and I would address these in the upcoming blogs. Yes, but for those having great ideas and plans in mind, you are most welcome to our place.

We design and offer solutions to your most critical problems and implementations.

We as a team endorse our efforts, designs, and are defining the future of the FPGA in the field of avionics.

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