PCIe GEN5 Data Link Layer

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PCIe GEN5 Data Link Layer Overview:

PCIe facilitates the connection between two devices and is responsible for smooth data exchange between them. To handle the transfer mechanism appropriately PCIe has 3 layers, which are Transaction layer, Data link layer, and Physical layer. The Data link layer is the intermediate layer, which supervises link management, data integrity of packets in transmission and re-transmission.

For years PCIe has served as a standard for interconnects being widely accepted throughout the industry. This piece of writing aims to showcase the working of the PCIe Gen5 Data Link Layer, guarding data exchange between the components on a link.

PCIe GEN5 Data Link Layer Offerings:

Power Management DLLP specifies the change of power management states depending on the link activity.
The bits in InitFC DLLP are fixed, and it only represents up to 127 for headers and 2047 for data.
Ports support data rates above 16.0 GT/s, and that must support scaled flow control.
DLCMSM takes care of flow control initialization and keeps track of link status.
DLLP specifies the features supported by the transmission port.