Dheeraj Punia

New Release: PCIe Gen6 Controller IP for High-Speed Computing.

Dheeraj Punia is a technical expert in SoC design, project management, and automotive functional safety, specializing in ISO 26262 compliance. He excels in clear communication and developing dependable, industry-standard systems.

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ARINC

ARINC 629 Digital Data Bus Specifications

Dheeraj Punia February 12, 2025

ARINC

AFDX®: A Time-Deterministic application of ARINC 664 part 7

Dheeraj Punia January 23, 2024

FPGA

FPGA Design, Architecture and Applications

Dheeraj Punia December 7, 2023

Whitepaper

AES 256 IP on Xilinx App Store

Dheeraj Punia November 8, 2022

Whitepaper

Accelerated Application Development on Amazon EC2 F1

Dheeraj Punia November 8, 2022

FPGA

Optimize Design Closure for an Effective FPGA Design System

Dheeraj Punia April 1, 2022

FPGA

Achieve High-Performance with Optimising Device Specifications in FPGA Design

Dheeraj Punia March 10, 2022

FPGA

FPGAs expansion in ADAS – Autonomous Driving

Dheeraj Punia February 17, 2022

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