OTN Framer and De-framer

To meet the increasing demand for increased bandwidth using optical fiber links, and to support 2.5 Gb, 10 Gb and 40 Gb broadband services, a new optical transport network layer was developed, the Optical Transport Network (OTN). OTN is the only standard capable of transporting 10GbE LAN PHY entirely.

Different from SONET-SDH that is time multiplexed (TDM), the OTN protocol is multiplexed in wavelength (WDM), lowering the costs of the network.

However, the main characteristic of the OTN standard is the presence of an error correction structure, based on the Reed-Solomon (255, 239) algorithm. This structure may correct up to 128 bytes in burst for each frame, enabling the use of longer optical links.

The Optical Transport Network (OTN) standard is described on the G.709 ITU-T recommendation, which defines an OTN winterface as a set of elements for optical networks capable of providing transporting functionality, multiplexing, routing, management and supervision of optical channels. The OTN interface must have the ability to carry signals from different types of clients.

LFT OTN Framer accepts user data from a FIFO and prepares the OTN Frame according to G.709 standard. It supports asynchronous payload mapping wherein a locally generated clock is used for OTN side interface, and positive and negative byte stuffing is applied to synchronize client and OTN interfaces.

FEC scheme is RS (255,239) Encoder. LFT has its expertise in FEC scheme and has internally developed a highly optimized RS Codec which can support up-toOTN4 (100 G) data rate. Besides LFT also have enhanced FECs such as LDPC, concatenated BCH codec, which can be used to further improve OTN
performance.
Scrambling is applied to all the data except OTN Framing pattern. High speed scrambling is achieved by storing the scrambling pattern in a Block ROM.

Serialization and deserialization is achieved by using FPGA inbuilt high speed Giga-bit transceivers (GTX) block. LFT here again has over more than 10 years of experience in making the GTX up and running.

In De-framer, frame aligner module is responsible to identify the FAS (Frame Align Sequence) sequence. The FAS includes 6 first bytes of a multi-frame. A  highly pipelined frame aligner block achieves the required logic synthesis frequency of 167 MHz.

The Path Health Monitor module processes ODUk overhead, and calculates and detects Path Monitoring BIP.Performance monitor counters are maintained such as OTUk-BIP, ODUk-BIP, ODUk-TCM-BIPs, BEI, RS decoding failure indication, etc.)

OTNSignalStructure

Features

  • Available for OTN1 and OTN2.
  • Fully ITU-T G.709 compliant.
  • G.709 GFEC – RS(255,239)
  • Detects and align to OTN framing pattern.
  • Processes OTUk, ODUk, and OPUk overhead.
  • SM, PM, and TCM[1-6] Overhead Processing.
  • ODUk BIP-8 monitoring support.
  • Supports asynchronous SONET/SDH payload mapping (accommodating positive/negative stuffing).
  • FPGA independent source code. Can be ported to any FPGA.

Enhancement Available (On Demand)

  • Support for OTN3, OTN4, and OTNflex
  • Multi-Lane OTN support (28×4 , 11.2 *10, 11.2*10)
  • Support for ODU Multiplexing
  • Support for Enhanced FECs like LDPC, concatenated BCH, etc.

Evaluation
An evaluation license is available for this core. The evaluation version of the core operates in the same way as the full version for some time, dependent on clock frequency. Operation is then disabled and the data output does not change.

IP Data Fact Sheet

Parameter

OTN1

OTN2

Data Rate 2.666 Gbps 10.709 Gbps
Data Interface Width 16 64
System Clock Rate 166.125 MHz 167.328125 MHz
LUTs/Regs/p> 6K 35K

Provided with IP

Documents Product Specification
Design Files RTL-VHDL (Optional)
Reference Design Provided
Test-Bench Provided (Optional)

Design Tools

Simulation ModelSim SE
Synthesis Tool Xilinx ISE /Altera Quartus
Support
Three Month Support Provided

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