LFT HEVC-A is a real-time hardware encoder IP core, supporting the latest video compression HEVC (High Efficiency Video Coding) standard. The design is highly scalable, requires minimal integration time and capable of processing resolutions up 4K real time with minimal hardware resources and power consumption. The design incorporates latest optimizations proposed in the literature blended with the expertise of Logic Fruit group.
Key Encoding Tools
- I,P and B slices
- Support all Intra-Prediction modes
- Support all Inter-Prediction modes
- Coding Tree Block (CTB) sizes from 16×16 to 64×64
- Transform Unit (TU) sizes from 4×4 to 32×32
- Up to 2 depths partitioning
- Weighted prediction
- Fractional sample interpolation – ¼ pixel
- Entropy coding modes: CABAC
- In-loop filters: De-blocking filter
- Slices, dependent slices, Tiles and WPP (Wavefront Parallel Processing)
- Per Coding Unit (CU) QP
Supported Interface
- AMBA APB interface for control registers programming
- AMBA AXI interface for data access
Key Advantages
- Any video resolution up to 4K resolution
- Unique scalable multi-core architecture
- Fast and easy integration within a wide range of System-On-Chip (SoC) designs
- Hardware architecture minimizes both gate counts and power consumption
- Independent entity, requiring minimum support from the SoC embedded CPU
- Advanced motion estimation algorithms optimized to fit the memory bandwidth and latency requirements of consumer SoCs
Performance | ||||||
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Deliverables | ||||||
| Documents | Product Specification | |||||
| Design Files | RTL-VHDL, C codes (Optional) | |||||
| Reference Design | Provided | |||||
| System Generator Model | Provided (Optional) | |||||
| MatlabBit-Accurate Model | Provided (Optional) | |||||
Design Tools | ||||||
| Simulation | ModelSim SE | |||||
| Synthesis Tool | Xilinx ISE /Altera Quartus | |||||
| Support | ||||||
| Three Month Support Provided | ||||||
